In a plasma reactor chamber for etching silicon or polysilicon thin films on a semiconductor wafer, a uniform distribution of etch rate across the wafer is needed. Non-uniform distribution of etch rate across the wafer is indicated by non-uniformity in critical dimension (CD). The critical dimension may be a width of a typical line in the thin film circuit pattern. The CD is less in areas on the wafer surface experiencing a higher etch rate and greater in areas of lower etch rate.
In silicon etch chambers in which the process gas is injected from the ceiling, it has been found that the CD is very small at the wafer edge compared to other areas on the wafer surface. The effect of a small CD is typically confined to the outer or peripheral 1% of the wafer surface. This problem was not solved using conventional techniques. Specifically, etch uniformity can be improved by dividing the gas distribution into independent inner and outer gas injection zones at the ceiling and maximizing uniformity by adjusting the gas flow rates to the inner and outer zones. However, adjustment of the inner and outer gas injection zone flow rates does not solve the problem of small CD at the outer 1% of the wafer surface. Specifically, adjustment of the inner and outer gas injection zone flow rates at the ceiling can produce fairly uniform CD across the wafer, with the exception of a region at the wafer edge whose width is about 1% of the wafer diameter.
Therefore, there is need to independently control the CD at the outer 1% of the wafer edge without detracting from etch rate distribution uniformity achieved for the other areas of the wafer.